Hackernews posts about RISC
RISC is an acronym for Reduced Instruction Set Computing, referring to a computer architecture that simplifies instruction sets to improve processing efficiency and performance.
Related:
Arch Linux CISC
- Easy RISC-V (dramforever.github.io)
- Writing a RISC-V Emulator in Rust (book.rvemu.app)
- Linux in a Pixel Shader – A RISC-V Emulator for VRChat (blog.pimaker.at)
- Upbeat Technology's RISC-V MCU Takes Flight with Near-Threshold Computing (www.allaboutcircuits.com)
- Berkeley Out-of-Order RISC-V Processor (Boom) (2020) (docs.boom-core.org)
- Speedrunning a CPU: RISC-V in a Week (daymare.net)
- Cheapest ARM Debugger is RISC-V (bogdanthegeek.github.io)
- Porting Lean to the ESP32-C3 RISC-V Microcontroller (kuruczgy.com)
- All Intel GPUs Run on Raspberry Pi and RISC-V (www.jeffgeerling.com)
- The RISC-V Hardware Wars: A Streetfighter's Unfiltered Take (www.eejournal.com)
- The RISC-V Hardware Wars: A Streetfighter's Unfiltered Take (www.eejournal.com)
- Proving Safety at Scale: Spark, RISC-V, and Nvidia's Security Strategy (blog.adacore.com)
- The next RISC-V processor frontier: AI (www.edn.com)
- Show HN:Interactive RISC-V CPU Visualizer (Sequential and Pipelined) (mostlykiguess.github.io)
- The RISC-V Instruction Tier List [video] (www.youtube.com)
- Barebones RISC-V OS written in Zig (2023) (timmy.moe)
- RVVM – RISC-V VM emulator (github.com)
- Meta reportedly buying RISC-V AI GPU firm Rivos (www.tomshardware.com)
- Bolt Graphics unveils Zeus GPU built on RISC-V and path tracing tech (www.theregister.com)
- I860 Intel took a RISC: it did not end well [video] (www.youtube.com)
- RISC-V was supposed to change everything–How's it going? [video] (www.youtube.com)
- Mojo-V: Secret Computation for RISC-V (github.com)
- Cheapest Arm debugger is RISC-V (hackaday.com)
- Show HN: River – simple RV32IM assembler ~600 loc (github.com)