Hackernews posts about RISC-V
RISC-V is an open-source instruction set architecture (ISA) that allows for custom and flexible processor designs, making it a highly programmable and versatile platform for various applications.
- RISC-V Is Sloooow (marcin.juszkiewicz.com.pl)
- Running RISC-V in a VM to test my snaps (blog.popey.com)
- RVA23 Ends Speculation's Monopoly in RISC-V CPUs (semiwiki.com)
- Refinement Modeling and Verification of RISC-V Assembly Using Knuckledragger (www.philipzucker.com)
- Canonical Talks Up RISC-V This Year with Ubuntu 26.04 LTS (www.phoronix.com)
- QRV Operating System: QNX on RISC-V (r-tty.blogspot.com)
- Show HN: ML accelerator on a RISC-V FPGA SoC – zero-cycle matmul, boots Linux (dstrbad.substack.com)
- Prompt to tape out: Autonomous AI agent builds 1.5 GHz RISC-V CPU (blog.adafruit.com)
- Dabao board features open-source hardware RISC-V MCU (www.cnx-software.com)
- Baochip-1x RISC-V microcontroller (github.com)
- Gatling-V: An FPGA-based RISC-V Vector Core (dl.acm.org)
- Show HN: Franklin Prompt Studio – Structured prompts for serious AI decisions (dfrankstudioz.gumroad.com)