Hackernews posts about RISC-V
RISC-V is an open-source instruction set architecture (ISA) that allows for custom and flexible processor designs, making it a highly programmable and versatile platform for various applications.
- Hacker gains access to the RP2350 OTP secret by glitching the RISC-V cores (www.tomshardware.com)
- VPR: Nordic's First RISC-V Processor (danielmangum.com)
- This Year, RISC-V Laptops Arrive (spectrum.ieee.org)
- RISC-V is making moves, but it has work to do if it wants to hit the mainstream (www.theregister.com)
- Video review: Ubuntu on RISC-V HiFive P550 board (www.youtube.com)
- This Year, RISC-V Laptops Really Arrive (spectrum.ieee.org)
- Big-Endian RISC-V (gitlab.com)
- A $0.03 RISC-V microcontroller brings an Acer N30 PDA back to life (liliputing.com)
- Chinese RISC-V project teases 2025 debut of freely licensed advanced chip design (www.theregister.com)
- Visualize RISC-V Vector Memory Instructions (myhsu.xyz)
- VPR: Arm and RISC-V Inter-Processor Communication (danielmangum.com)
- RISC-V in AI and HPC (www.eetimes.com)
- SpacemiT Develops V100 RISC-V Server CPU Chip for Next-Generation AI Apps (finance.yahoo.com)
- RISC-V in AI and HPC Part 1: Per Aspera Ad Astra? (www.eetimes.com)
- VPR: Arm and RISC-V Inter-Processor Communication (danielmangum.com)
- Failing a Continuous Integration Test for Apache NuttX RTOS (QEMU RISC-V) (lupyuen.github.io)
- VPR: Arm and RISC-V Inter-Processor Communication (danielmangum.com)
- VPR: Arm and RISC-V Inter-Processor Communication (danielmangum.com)
- VPR: Nordic's First RISC-V Processor (danielmangum.com)
- Yudkowsky and Wolfram on AI Risk [video] (www.youtube.com)
- A new RISC-V Mainboard from DeepComputing (frame.work)
- Pineapple ONE: open-source 32 bit RISC-V CPU that you can make at home (pineapple-one.github.io)
- The risk of RISC-V: What's going on at SiFive? (morethanmoore.substack.com)
- Android and RISC-V: What you need to know to be ready (opensource.googleblog.com)
- Nordic is getting involved in RISC-V (blog.nordicsemi.com)
- Debian riscv64 (blog.aurel32.net)
- Tenstorrent unveils Grayskull, its RISC-V answer to GPUs (www.techradar.com)
- How a CPU works: Bare metal C on my RISC-V toy CPU (florian.noeding.com)
- Open-source high-performance RISC-V processor (github.com)
- A Bendy RISC-V Processor (spectrum.ieee.org)
- A Lisp compiler to RISC-V written in Lisp (www.ulisp.com)
- A trustworthy, free (libre), Linux capable, self-hosting 64bit RISC-V computer (www.contrib.andrew.cmu.edu)
- Writing an OS in Rust to run on RISC-V (gist.github.com)
- Regarding Proposed US Restrictions on RISC-V (www.bunniestudios.com)
- BeagleV-Ahead RISC-V board (beagleboard.org)
- 432-Core RISC-V European Processor Designed for Use in Space Taped Out (www.hpcwire.com)
- BeagleV-Ahead open-source RISC-V single board computer (www.beagleboard.org)
- Milk-V Duo: A $9 RISC-V Computer (milkv.io)
- Octox: Unix-like OS in Rust inspired by xv6-riscv (github.com)
- Show HN: RISC-V core written in 600 lines of C89 (github.com)
- A cryptographically secure bootloader for RISC-V in Rust (www.codethink.co.uk)
- Jim Keller on AI, RISC-V, Tenstorrent’s Move to Edge IP (www.eetimes.com)