Hackernews posts about RISC-V

RISC-V is an open-source instruction set architecture (ISA) that allows for custom and flexible processor designs, making it a highly programmable and versatile platform for various applications.

RSS feed for RISC-V

Related:Intel FPGA NASA Alibaba ESP32 GCC SiFive Haiku OS Verilog HiFive Unmatched VisionFive 2 Milk-V Milk-V Duo DeepComputing Apple Google

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newShow HN: Our space game has a built-in RISC-V emulator that runs Linuxagainstallodds.games
▲ 96nor-and-or-not 6d 💬 36
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newEvery Nvidia GPU has 10 to 30 RISC-V cores inside itwww.xda-developers.com
▲ 50giuliomagnifico 18d 💬 5
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newArbel: Building the Impossible RISC-V CPUwww.nextsilicon.com
▲ 6ronfriedhaber 28d discuss
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newAI agent designs a complete RISC-V CPU from a 219-word spec sheet in 12 hourswww.tomshardware.com
▲ 5fork-bomber 17h 💬 1
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newShow HN: OpenC6 v2.0 – Bare-metal BIOS and RISC-V microkernel for ESP32-C6github.com
▲ 4Rompass 7d discuss
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newTinyEMU is a system emulator for the RISC-V and x86 archsgithub.com
▲ 4Bluestein 26d discuss
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newSiFive and AMD Collaborate to Optimize AMD ROCm on RISC-V Datacenter Serversfinance.yahoo.com
▲ 3galaxyLogic 23d discuss
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newCanonical Evolution of Enterprise Open Source RISC-V at Hot Chips 2026www.servethehome.com
▲ 3fork-bomber 29d discuss
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newReleasing Open Source RISC-V Configurable In-Order/OoO Multi-Core+AI Processorgithub.com
▲ 2etcimon 8d 💬 1
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newUpbeat Launches Bluemag SiFive RISC-V Based Pi Drone Controller with Onboard AIwww.upbeattechtw.com
▲ 2fork-bomber 17h discuss
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newPasRISCV – A RISC-V RV64GCV/RVA23 Emulator Written in Object Pascalgithub.com
▲ 2peter_d_sherman 3d discuss
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newTiny-Vedas: a generic accelerator interface for RISC-V, from PyTorch op to GDSgithub.com
▲ 2marcux95 20d discuss
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newRISC-V emulator in pure Nixgithub.com
▲ 2eisbaw 24d discuss
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newInfineon RISC-V for Automotive at Hot Chips 2026www.servethehome.com
▲ 2fork-bomber 24d discuss
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newSERV – The SErial RISC-V CPUgithub.com
▲ 1kristianpaul 22h 💬 1
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newCanMV-K230D-Zero Development Board – RISC-V, 128MB LPDDR4 on MCU SoCwww.kendryte.com
▲ 1peter_d_sherman 8d discuss
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newTiny-Vedas: RISC-V Infrastructure for AI Accelerator Design [pdf]siliscale.com
▲ 1marcux95 14d discuss
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newRISC-V: What next after RVA23?ubuntu.com
▲ 1cbolton 21d discuss
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newEpicSemi Contrail AIX RISC-V Serverswww.epicsemi.com
▲ 1xlmnxp 21d discuss
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newRvvts – The RISC-V Vector Test Framework (V2)github.com
▲ 1fork-bomber 24d discuss
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newShow HN: Cactus Needle 3: 8-29MB automation models can match DeepSeek V4 Flashcactuscompute.com
▲ 236HenryNdubuaku 21d 💬 93
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newShow HN: I made a tiny MoE/Engram viz toolsw-ml-study.github.io
▲ 2softwarewright 24d discuss
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newPi(e) in a box: running pi on risk-v inside a VM inside TinyEmu inside WASMdeepclause.substack.com
▲ 2schmuhblaster 24d discuss
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newRunning Doom on Linux inside TinyEmu inside Docker inside WASM inside Electrondeepclause.substack.com
▲ 1schmuhblaster 20d discuss
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newA third world engineer responds to “RISC-V: They should have known better”rvembedded.com
▲ 625Narishma 53d 💬 333
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newSkiftOS: A hobby OS built from scratch using C/C++ for ARM, x86, and RISC-Vskiftos.org
▲ 466ksec 390d 💬 97
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newEasy RISC-Vdramforever.github.io
▲ 401todsacerdoti 346d 💬 80
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newRISC-V: They Should Have Known Betterdmitry.gr
▲ 397dmitrygr 55d 💬 454
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newRISC-V Is Sloooowmarcin.juszkiewicz.com.pl
▲ 317todsacerdoti 212d 💬 378
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newRISC-V is now officially supported by CPythonblog.python.org
▲ 306lumpa 45d 💬 66
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newXiangShan – Open-source high performance RISC-V processorgithub.com
▲ 270gjvc 644d 💬 98
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newRISC-V takes first step toward international ISO/IEC standardizationriscv.org
▲ 265jrepinc 343d 💬 106
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newA Lisp compiler to RISC-V written in Lispwww.ulisp.com
▲ 248chrisjj 727d 💬 72
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newAlibaba/T-HEAD's Xuantie C910: An open source RISC-V corechipsandcheese.com
▲ 221mfiguiere 611d 💬 76
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newEurope bets once again on RISC-V for supercomputingwww.theregister.com
▲ 219muxamilian 578d 💬 219
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newESP32-S31: Dual-Core RISC-V SoC with Wi-Fi 6, Bluetooth 5.4, and Advanced HMIwww.espressif.com
▲ 203topspin 193d 💬 149
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newHacker gains access to the RP2350 OTP secret by glitching the RISC-V coreswww.tomshardware.com
▲ 203EvgeniyZh 641d 💬 30
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newRISC-V Mainboard for Framework Laptop 13 is now availableframe.work
▲ 202WithinReason 610d 💬 66
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newRocky Linux 10 Will Support RISC-Vrockylinux.org
▲ 196fork-bomber 505d 💬 132
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newLinux running inside a PDF file via a RISC-V emulatorgithub.com
▲ 183shantara 615d 💬 38
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newRISC-V single-board computer for less than 40 euroswww.heise.de
▲ 179doener 426d 💬 105
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newRISC-V: They should have known betterdmitry.gr
▲ 175kaycebasques 55d 💬 1
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newRISC-V HiFive Premier P550 Development Boards with Ubuntu Now Availablewww.sifive.com
▲ 172fork-bomber 666d 💬 94
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newLinux Runs on Raspberry Pi RP2350's Hazard3 RISC-V Cores (2024)www.hackster.io
▲ 168walterbell 278d 💬 66
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newVPR: Nordic's First RISC-V Processordanielmangum.com
▲ 165hasheddan 653d 💬 40
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newCondor's Cuzco RISC-V Core at Hot Chips 2025chipsandcheese.com
▲ 157rbanffy 404d 💬 49
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newA Verilog to Factorio Compiler and Simulator (Working RISC-V CPU)github.com
▲ 154signa11 196d 💬 22
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newRISC-V Routerrouter.start9.com
▲ 152janandonly 147d 💬 85
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newDeepComputing: Early Access Program for RISC-V Mainboard for Framework Laptop 13deepcomputing.io
▲ 150sohkamyung 694d 💬 67
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newShow HN: I integrated my from-scratch TCP/IP stack into the xv6-riscv OSgithub.com
▲ 147pandax381 408d 💬 12
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newThe RISE RISC-V Runners: free, native RISC-V CI on GitHubriseproject.dev
▲ 143thebeardisred 196d 💬 45
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newMilk-V Titan: A $329 8-Core 64-bit RISC-V mini-ITX board with PCIe Gen4x16www.cnx-software.com
▲ 140fork-bomber 269d 💬 82
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newBook: RISC-V System-on-Chip Designwww.amazon.com
▲ 138xlmnxp 91d 💬 76
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newWhat is RISC-V and why it matters to Canonicalubuntu.com
▲ 135fork-bomber 183d 💬 122